Enlarge / Silicon wafers from a TSMC manufacturing facility. (credit score: Taiwan Semiconductor Manufacturing Co., Ltd.)
It has been rumored for a number of months now that Apple shall be utilizing a brand new three nm manufacturing course of from Taiwan Semiconductor (TSMC) for its next-generation chips, together with M3 sequence processors for Macs and the A17 Bionic for some next-gen iPhones. However new reporting from The Data illuminates among the favorable phrases that Apple has secured to maintain its prices down: Apple locations big chip orders price billions of {dollars}, and in return, TSMC eats the price of faulty processor dies.
At a really excessive degree, chip firms use giant silicon wafers to create a number of chips without delay, and the wafer is then sliced into many particular person processor dies. It is regular, particularly early within the lifetime of an all-new manufacturing course of, for a lot of of these dies to finish up with defects—both they do not work in any respect, or they do not carry out to the specs of the corporate that ordered them.
Usually, chip designers must pay for every particular person die whether or not it labored or not; that is a significant purpose why firms promote cut-down or “binned” chips that run at decrease clock speeds or have elements switched off. That method, they’ll get well some cash from a faulty die as an alternative of none. Apple’s orders with TSMC are apparently giant sufficient that TSMC can afford to not cost Apple for faulty dies.
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